NEO Semiconductor Achieves Major Milestone with 3D X-DRAM Technology and Strategic Investment

NEO Semiconductor's Breakthrough in 3D X-DRAM Technology

In a groundbreaking announcement made on April 23, 2026, NEO Semiconductor, an innovative leader in AI and memory technologies, revealed a successful proof-of-concept (POC) for its cutting-edge 3D X-DRAM technology. This pivotal milestone is set to significantly enhance next-generation, high-density memory solutions tailored for AI and data-centric systems.

During a press conference held in San Jose, California, the company showcased the POC test chips that successfully validate the manufacturability of its 3D X-DRAM using existing 3D NAND-based processes. These results not only affirm the scalability of the technology but also demonstrate that it meets critical DRAM performance benchmarks, including an impressive read/write latency of less than 10 nanoseconds and exceptional data retention capabilities above the industry-standard expectations.

NEO's POC results underscore a major advancement in DRAM technology. The endurance of the memory was proven to exceed 10^14 cycles, further solidifying its reliability and performance metrics. Andy Hsu, founder and CEO of NEO Semiconductor, emphasized that these breakthroughs are significant not merely from a technical standpoint, but they also align perfectly with the industry's shift towards AI-driven applications. As energy efficiency and higher density become increasingly crucial in memory products, NEO’s innovative approach positions it favorably within the market.

The company's efforts have drawn notable attention and commendations from industry analysts. Jeongdong Choe, Senior Technical Fellow and SVP at TechInsights, pointed out that this achievement represents a critical shift as conventional DRAM approaches its scaling limits. NEO's silicon POC sets a promising blueprint for future innovation by demonstrating real-world applicability.

A significant aspect of this announcement is the strategic investment lead by Stan Shih, the visionary founder of Acer. Shih's backing not only validates NEO’s technology but also signals confidence in the future trajectory of the company. As memory requirements escalate globally, the collaboration between industry leaders like Shih and NEO Semiconductor is poised to catalyze advancements in memory technologies.

The collaboration has produced tangible results, backed by the National Yang Ming Chiao Tung University (NYCU) in Taiwan and the National Institutes of Applied Research - Taiwan Semiconductor Research Institute (NIAR-TSRI). By leveraging their combined expertise, NEO successfully validated the feasibility of the 3D DRAM concept under real manufacturing conditions, showcasing the strength and potential of industry-academia partnerships in driving technological advancements.

Looking forward, NEO aims to build on this momentum by advancing its technology towards commercialization, including array-level implementations and multi-layer test chip development. Current discussions with leading memory and semiconductor companies signal a promising future for NEO’s 3D X-DRAM technology as the company seeks to carve out its place in the next generation of AI memory systems.

Andy Hsu is set to herald these innovations during a keynote presentation at the Future of Memory and Storage conference on August 4-6, 2026. This event will feature insights into the recently validated POC results alongside NEO’s vision for the future of memory technology in the age of AI.

In summary, the unveiling of NEO Semiconductor’s 3D X-DRAM technology marks an important leap forward in the field of memory technologies. With strategic investments and strong institutional backing, the future looks bright for NEO, positioning it at the forefront of technological advancements aimed at fulfilling the growing demands of the AI landscape.