QuickLogic Introduces Next-Generation eFPGA Hard IP
QuickLogic Corporation, a prominent semiconductor firm, has recently announced the launch of its latest evolution in embedded field-programmable gate array (eFPGA) technology. The new eFPGA Hard IP is tailored for GlobalFoundries' (GF) 12LP process technology, known for its commitment to delivering high-performance solutions for compute-intensive tasks. This next-generation design not only enhances performance but also introduces expanded capabilities, fitting a variety of demanding applications.
Key Improvements and Features
The upgraded eFPGA Hard IP is built on QuickLogic's proven technology and features several enhancements that set it apart from its predecessors:
1.
Enhanced Signal Processing: At the heart of this new offering is the advanced Digital Signal Processing (DSP) unit, which includes a Multiply-and-Accumulate (MAC) function. This enhancement is particularly beneficial for applications such as phased array radar, electronic warfare systems, satellite communications, and complex imaging algorithms. The new DSP unit boasts improved preadder and cascading functionalities, along with Single Instruction, Multiple Data (SIMD) capabilities, significantly boosting signal processing efficiency.
2.
Scalability Beyond 250K LUTs: The eFPGA can be configured to accommodate over 250,000 Look-Up Tables (LUTs), providing support for intricate designs that require substantial embedded programmable logic. This scalability is pivotal for developers aiming to create more complex SoCs without compromising on performance.
3.
Optional Configuration Bit Health Monitor: A standout feature of the new eFPGA is the optional Configuration Bit Health Monitor. This component plays a crucial role in ensuring configuration integrity by detecting and rectifying errors caused by Single Event Upsets (SEUs). For applications where real-time reliability is of the essence, this feature delivers an additional layer of assurance, making it ideal for mission-critical deployments.
Insights from QuickLogic
Andy Jaros, Vice President of IP Sales at QuickLogic, emphasized the growing need for adaptability in hardware post-manufacturing in today's tech landscape. He stated, "Customers increasingly want the flexibility to adapt hardware functions after tape-out without sacrificing the performance, power, and area advantages of an ASIC." The enhanced eFPGA Hard IP satisfies this demand by offering a robust balance of scalability and advanced signal-processing abilities.
Embedded Flexibility
QuickLogic's eFPGA Hard IP allows for the embedding of programmable logic directly within a system-on-chip (SoC). This design flexibility means that crucial hardware functions, algorithms, and interfaces can be modified even after the manufacturing process has been completed. The architecture facilitates user-defined combinations of LUT, BlockRAM, and DSP resources, making it suitable for a wide array of applications ranging from industrial to consumer markets.
Upcoming Showcase
To further elaborate on this cutting-edge technology, QuickLogic will be showcasing its enhanced GF 12LP eFPGA Hard IP at the GlobalFoundries Technology Summit (GTS) North America. Attendees of the event will have the opportunity to interact with the QuickLogic team at their booth #11 in the Partner Pavilion, set to take place at the Santa Clara Marriott in California on September 2, 2026.
Conclusion
QuickLogic is committed to pushing the boundaries of what's possible with embedded FPGA technologies. Their unique approach combines innovative development with open-source tools, facilitating highly customizable, low-power solutions that cater to sectors such as aerospace, defense, industrial, and consumer electronics. For more information on their latest advancements, please visit
QuickLogic's website.