Synopsys Unveils Next-Gen High-Performance Verification Systems for Semiconductor Innovation

Synopsys Expands Its High-Performance Verification Portfolio

In a significant development for the semiconductor industry, Synopsys, Inc. has announced an expansion of its premier hardware-assisted verification (HAV) portfolio. This latest upgrade is centered around the HAPS®-200 prototyping and ZeBu®-200 emulation systems, which leverage AMD's cutting-edge Versal™ Premium VP1902 adaptive SoC. These new systems not only enhance runtime performance but also offer improved compile times and better debugging capabilities, essential for advanced semiconductor design.

Elevating Performance Standards

The next generation of the HAPS-200 prototyping system has been designed to deliver remarkable performance, boasting a runtime speed that is double that of its predecessor, the HAPS-100. It also offers a meticulously increased debug efficiency, which is reported to be four times better. This means that engineers can expect a significant reduction in turnaround times while working with increasingly complex systems on a single hardware setup.

Simultaneously, the ZeBu-200 emulation system has made noteworthy strides, promising up to two times the runtime performance compared to the previous ZeBu EP2 version. Developers can benefit from a substantial expansion of design capacity, pushing up to 15.4 billion gates (BG), which is vital as the industry moves toward handling intricate designs that include multi-die architectures and complex software integrations.

With the rapid progression towards hundreds of billions of gates per chip, industry leaders such as AMD, Arm, NVIDIA, and SiFive have begun deploying Synopsys' prototyping and emulation technologies, emphasizing the solution’s relevance in current and future technological landscapes.

Flexibility and Scalability with EP-Ready Hardware

The new Synopsys Emulation and Prototyping (EP-Ready) Hardware platform is instrumental in providing flexibility by allowing configurations for emulation and prototyping use cases across multiple projects. This means that hardware can be optimized to suit specific needs without the need for substantial upfront investments in varying emulation and prototyping capabilities. As a result, customers can realize a more rewarding return on investment by utilizing the same hardware set-up for different project demands.

Salil Raje, AMD’s senior vice president, expressed that the integration of their adaptive SoC technology into Synopsys' platforms significantly enhances their performance metrics and alters the validation landscape for design teams. With this technological synergy, semiconductor design complexity is managed more efficiently, directly influencing market timelines and product development cycles.

Greater Emphasis on Scalability and Efficiency

Among the critical advancements offered by Synopsys is its Modular HAV methodology, which allows industry-leading scalability beyond 60 billion gates through the ZeBu Server 5. This enhanced methodology integrates interface protocols that support complete silicon-proven solutions, making it easier for engineering teams to work on significantly intricate designs without compromising on efficiency. Additionally, the advancements in hybrid technology enable faster software brings-up processes—being able to boot Android in less than 10 minutes showcases that.

As these developments unfold, the growing complexity of algorithms, particularly within AI and machine learning workloads, adds new verification challenges. The industry’s escalating demands for large GPU and CPU capacity are pushing companies like NVIDIA to seek the fastest prototyping solutions available. In this environment, Synopsys' HAPS-200 serves as a critical enabler, helping reduce time-to-market pressures while ensuring product quality and reliability.

Conclusion

The continuous innovation at Synopsys signals a pivotal shift in how companies will approach verification challenges in semiconductor design. As industry leaders adopt these high-performance systems, the future of chip design looks promising, with a shared platform of efficiency, scalability, and performance that promises to meet the ambitious goals of today’s increasingly complex electronics.

For more details on the capabilities and implementations of these innovative systems, explore the full range of Synopsys HAV solutions on their website.