Toray Research Center to Host Free Semiconductor Analysis Event
On June 19, 2026, the Toray Research Center is set to host the
Semiconductor and Electronic Materials Poster Session 2026 at the Ota City Industrial Plaza (PiO) in Tokyo, Japan. This exciting event will focus on the latest analysis technologies and practical application cases in the semiconductor and electronic materials sector.
Designed primarily for semiconductor device, equipment, and materials manufacturers, the event will feature a variety of engaging activities aiming to foster direct interaction between researchers and attendees.
Event Highlights:
- - Poster Exhibits: Visitors can explore 65 poster displays covering a range of topics in semiconductor and electronic materials.
- - Technical Presentations: Keynote speeches will revolve around advanced device and package evaluation techniques.
- - Free Discussions: Attendees are encouraged to engage in open conversations with researchers at the poster displays, providing an excellent opportunity for networking and gaining insights relevant to their work.
The event's content is designed to yield practical hints for attendees, addressing questions such as:
- - What can be understood through various analysis methods?
- - What should be prioritized in development, production, and reliability assessments?
Event Details:
- - Date: June 19, 2026 (Friday)
- - Time: 1:00 PM – 5:00 PM
- - Location: Ota City Industrial Plaza (PiO), Tokyo, Japan
- - Admission Fee: Free (Pre-registration is required)
We warmly welcome everyone involved in semiconductor and electronic materials development, processes, evaluation, and analysis. Please note that representatives from competing companies are kindly requested to refrain from attending this event. We appreciate your understanding.
Technical Presentations Overview:
The event will include several talks, showcasing advanced analysis technologies:
1.
Evaluation of Multi-Layer Thin Films with Oxide Semiconductors: Explore the implications of thin film structure changes due to annealing processes affecting device characteristics.
2.
Supporting Evaluation Technologies for Photonic-Electric Heterogeneous Integration: Delve into analysis techniques addressing the increasing power consumption of data centers.
3.
Solutions to Bonding Technology Challenges in Advanced Packaging: Discover the evaluation methods aimed at enhancing reliability in high-density bonding interfaces.
4.
Local Structure Analysis of Cu/Low-k Wiring using AFM-IR: Learn how this technology achieves high spatial resolution in chemical structure analysis of semiconductor materials.
Poster Presentation Topics:
Among the diverse topics presented:
- - Electronic State, Defect, and Optical Property Evaluation: Analysis techniques for identifying defects in various insulation films and interfaces.
- - Thin Film and Interface Structure Analysis: Insights into production and process evaluation techniques, including ALD-SiN film studies and in-situ crystal structure analysis.
- - Microstructure, 3D Observation, and In-situ Analysis: Techniques enabling real-time observation of material behaviors during examinations.
- - Gas and Volatile Component Analysis: Methods for detecting unseen risks from semiconductor packaging and materials, ensuring safety and reliability.
This event serves as a hub for professionals in the semiconductor realm, fostering collaboration and sharing cutting-edge analysis techniques crucial for advancing technology.
Registration:
To attend, please visit the registration link provided. As the event is free, prior registration is needed for attendance. We look forward to your participation!