InPsytech Accelerates Chiplet Ecosystem Innovation with UCIe 3.0 Technology at OCP 2025 Summit
On October 14, 2025, InPsytech, a subsidiary of Egis Technology, made headlines at the Open Compute Project (OCP) Global Summit in San Jose, California, where they revealed their cutting-edge UCIe (Universal Chiplet Interconnect Express) 3.0 technology, fabricated on an advanced 3nm process. This announcement is significant as it marks a major step forward in high-speed interconnection solutions that cater to the rapidly evolving needs of the semiconductor industry.
During the summit, held from October 13 to 16, attendees witnessed the live demonstration of InPsytech's UCIe 3.0 technology, which integrates the latest specifications for 3D packaging, delivering high performance with lower power consumption. The technology is designed to support data transfer rates of up to 64 GT/s, facilitating efficient interconnections between chiplets and enabling heterogeneous semiconductor integration.
Significance of UCIe 3.0 Technology
InPsytech has been at the forefront of developing high-speed, low-power interface intellectual property technologies. With a focus on advancing the ecosystem of chiplets, the company has continually refined its UCIe technology, enhancing compatibility across various advanced process nodes ranging from 22nm to 2nm. The latest UCIe 3.0 specification is fully compliant with industry standards, positioning InPsytech as a leader in next-generation interconnection technologies.
David Hsu, the Chief Operating Officer of InPsytech, expressed pride in showcasing their innovative capabilities alongside industry partner Alcor Micro Corp. InPsytech's UCIe technology has been effectively integrated into Alcor Micro's latest Mobius100 processor platform, based on Arm architecture, which was also on display at the summit. This collaboration emphasizes the importance of strategic partnerships in driving innovation within the chiplet ecosystem.
Collaboration with Alcor Micro
The Mobius100 platform leverages Arm's CSS Neoverse architecture, enabling flexible interconnections among die-to-die processors while also incorporating graphics processors and accelerators for artificial intelligence. The integration of InPsytech's UCIe technology within this platform highlights its potential to enhance heterogeneous computing and chiplet designs, paving the way for accelerated advancements in semiconductor applications.
“By partnering with Alcor Micro, we are confident that our UCIe technology can significantly boost the adoption of chiplet architecture, fostering further innovations in the global semiconductor landscape,” stated Hsu. This sentiment underscores the strategic role of collaborative efforts in pushing the boundaries of semiconductor technology.
The UCIe 3.0 demonstration at the OCP 2025 Summit not only showcased InPsytech's technological prowess but also illustrated its commitment to driving the chiplet ecosystem forward. The company's participation in this prestigious event reflects its dedication to fostering innovation in the semiconductor industry, enabling better performance and energy efficiency across various applications.
Event Highlights
- - Event: OCP Global Summit 2025
- - Date: October 13-16, 2025
- - Location: San Jose Convention Center, California, USA
- - Exhibition Area: Innovation Village
- - Presentation: Demonstration of UCIe 3.0 technology (with 3D packaging support)
- - Partner: Alcor Micro Corp.
In conclusion, InPsytech's presentation at the OCP 2025 Summit emphasizes the company’s commitment to pioneering advancements in chiplet technology through collaborative innovation and robust R&D efforts. As the semiconductor industry continues to evolve, InPsytech's groundbreaking UCIe 3.0 technology positions it as a key player poised to shape the future of chiplet ecosystems.