#USA #Lam Research #Semiconductor #Albany, New York #IBM

IBM and Lam Research Announce Collaboration for Sub-1nm Logic Scaling

In a groundbreaking collaboration, IBM and Lam Research have teamed up to tackle the challenges associated with sub-1nm logic scaling. This partnership marks a significant milestone in semiconductor technology, as both companies aim to develop innovative processes and materials that will pave the way for next-generation logic devices.

Background of the Collaboration

Having worked together for over ten years, IBM and Lam have previously achieved significant advancements in semiconductor technology, particularly in the development of 7nm, nanosheet, and EUV process technologies. Their new five-year agreement focuses on extending the limits of logic scaling to below 1 nanometer, addressing the pressing need for smaller, more efficient semiconductor devices.

The collaboration will concentrate on creating novel materials and enhancing fabrication processes. Specific efforts will be dedicated to developing advanced etching and deposition techniques that can accommodate the intricate architectures of emerging devices. Furthermore, High NA EUV lithography processes will be critical in this endeavor, enabling precise patterning necessary for upcoming generations of logic devices.

Driving Innovation in Logic Scaling

As the demand for faster and more efficient semiconductor devices continues to rise, the industry faces increasingly complex challenges in scaling. Vahid Vahedi, chief technology and sustainability officer at Lam Research, emphasizes the necessity of rethinking how materials, processes, and lithography function together in a cohesive system. He believes that this collaboration will accelerate breakthroughs in technology essential for the AI era.

Mukesh Khare, GM of IBM Semiconductors and VP of hybrid cloud at IBM Research, echoed this sentiment by acknowledging the crucial role Lam has played in IBM's previous successes. He stated, "We are thrilled to be expanding our collaboration to tackle the next set of challenges to enable High NA EUV lithography and sub-1nm nodes."

Methods and Technologies in Focus

The joint efforts of IBM and Lam will involve leveraging IBM’s advanced research capabilities located at the NY Creates Albany NanoTech Complex alongside Lam’s suite of innovative process tools. This includes the Aether® dry resist technology and Kiyo® and Akara® etch platforms. These technologies will be integral in forming full process flows for nanosheet and nanostack devices as well as facilitating backside power delivery.

Developing and validating these processes is essential for ensuring that High-NA EUV patterns can be accurately transferred into actual device layers, providing a foundation for high-yield production of future logic devices. The goal is not only to improve performance and yield but to facilitate the commercial viability of advanced semiconductor technologies.

The Future of Semiconductor Technology

Both IBM and Lam are cognizant of the rapid pace at which semiconductor technology is evolving. Their collaboration represents a strategic push to remain at the forefront of the industry, particularly as competitors race towards 3D scaling techniques and other advanced solutions that require innovative thinking and partnership.

The combination of IBM's expertise in hybrid cloud and AI with Lam's semiconductor fabrication technology forms a powerful alliance that promises to redefine what is possible in semiconductor design and manufacturing.

In conclusion, the partnership between IBM and Lam Research not only signifies a step forward in the push towards sub-1nm logic scaling but sets the stage for future innovations that will underpin the semiconductor industry for years to come. As advances in technology continue to unfold, this collaboration may very well play a crucial role in shaping the landscape of computing and technology, particularly as demands increase for powerful, efficient, and smaller semiconductor devices.