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Alcor Micro Unveils Advanced Arm-Based CPU Platform at OCP Global Summit 2025

Alcor Micro Unveils Its Latest Arm-Based CPU Platform

Alcor Micro, a notable subsidiary of Egis Technology Inc., has announced its participation in the OCP Global Summit 2025, taking place in San José, California, from October 13 to 16, 2025. Here, the company will showcase its newest Arm-based CPU platform, the Mobius100 (CSS V3). This cutting-edge technology, featuring an 8-core emulation platform, is tailored for artificial intelligence (AI) servers and high-performance computing (HPC), solidifying Alcor Micro's position as a leader in innovative open computing and advanced chip architecture.

Collaborative Innovation within the Arm Ecosystem

The demonstration at the OCP Summit aims to highlight the collaborative spirit and innovative advancements within the Arm ecosystem. Partnering with Cadence and Jmem Tek, Alcor Micro is introducing a groundbreaking digital twin design platform alongside its 8-core Arm CSS V3 platform. This not only redefines the architecture but also revolutionizes the design flow and development standards for next-generation chips. This collaborative effort is critical for accelerating the integration of heterogeneous chips and propelling innovation in system-level architecture.

Pioneering the Future of Chiplet Architecture and Heterogeneous Computing

At the forefront of technological advancements, Alcor Micro is utilizing the latest Arm CSS V3 EAC2 architecture, which efficiently interconnects CPU chips as the central control unit for computing. This architecture allows seamless connectivity with GPUs, NPUs, and various AI accelerators, facilitating true heterogeneous computing integration. The design enhances overall system performance and scalability, laying a robust foundation for upcoming AI and HPC applications. By leveraging the low-power architecture of Arm CPUs, Alcor Micro achieves exceptional efficiency in performance per watt, delivering remarkable computing capabilities with minimal energy consumption, thus aligning with global energy efficiency and sustainability goals.

Securing Chip-Level Computing with PQC Based on PUF

In a notable move towards enhanced chip-level security and reliability, Alcor Micro has developed a Post-Quantum Cryptography (PQC) solution based on PUF technology in collaboration with Jmem Tek. This solution has received multiple international certifications, including NIST FIPS 140-3 CAVP, FIPS 203 (ML-KEM), and FIPS 204 (ML-DSA), ensuring its compliance with the latest ASCON algorithm per SP 800-232 standards. With native hardware acceleration and a low-latency architecture, this technology offers secure, high-speed, energy-efficient quantum protection at the chip level, effectively defending against emerging quantum decryption threats.

Empowering the Arm Ecosystem Through Total Design Collaboration

As a vital member of the Arm Total Design Partner network in the design services category, Alcor Micro brings vast expertise in the design and integration of Arm-based CSS CPU platforms. The newly developed Mobius100 CPU plays a crucial role within the Arm CSA ecosystem, delivering flexible and cost-effective CSS CPU chiplet solutions for AI and HPC server markets. "AI workloads are pushing the boundaries of traditional SoC design, compelling the industry to scale more efficiently," remarked Eddie Ramírez, VP of Arm's Infrastructure Business Marketing. The Mobius100, based on Neoverse CSS and developed within the Arm Total Design ecosystem, illustrates how a chiplet-based approach can significantly accelerate innovation and time to market.

By merging Alcor Micro's advanced package design expertise with a modular chiplet architecture, the Arm-based CSS CPU chiplet achieves high integration flexibility and package reuse, ultimately accelerating system-level innovation based on chiplet architecture and driving the future of open computing.