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M31 Advances AIoT Innovation with Ultra-Low Power Memory Compilers on TSMC N6e Platform

M31 Technology Corporation has officially unveiled its latest innovations in ultra-low power memory compilers at the 2025 TSMC North America Open Innovation Platform Ecosystem Forum. This announcement comes as M31 introduces its cutting-edge Ultra-Low Leakage (ULL), Extreme Low Leakage (ELL), and Low-VDD memory compilers developed on TSMC's advanced N6e platform.

Overview of New Products

The new memory compilers are strategically designed to address the growing demand for energy-efficient solutions in AI-driven edge devices and Internet of Things (IoT) applications. Recognized for its excellence, M31 has been honored with the TSMC 2025 OIP IP Partner Award, showcasing their dedication to innovation and collaboration within the semiconductor industry.

Developed with a solid foundation of low-power consumption technologies established through the N12e process, M31's latest offerings extend its capabilities with tailored memory compilers that leverage LL, ULL, and ELL SRAM bit cells. These are ideal for a variety of applications, including smart home devices, wearables, and various edge functionalities that require a careful balance of performance and power efficiency.

Features of the New Memory Compilers

The ultra-low leakage memory compilers are built for the TSMC N6e process and promise high density and performance with several advanced features:

• - High-Performance SRAMs: Delivering robust performance inserts into the design of devices keeping high-density requirements in check.
• - One Port Register File: The compiler supports vital features like redundancy, power gating, and built-in self-test (BIST), ensuring reliability during operations.
• - Dynamic Voltage and Frequency Scaling (DVFS): Enhances the versatility of designs by enabling support for dual-rail configurations that cater to varying operational requirements.

The high-sigma design methodology enhances operational reliability within optimized margin conditions, making these memory compilers very competitive in the market.

The ELL memory compilers also prioritize energy-saving, achieving a remarkable 50% reduction in power usage during deep sleep modes. This advantage is essential for designs that face strict limiters on power consumption and physical dimensions, without sacrificing performance or flexibility in customization. Additionally, the Low-VDD memory compilers are capable of operating as low as 0.5V, facilitating significantly lower dynamic and leakage power consumption.

Ongoing Recognition and Future Aspirations

M31’s achievement does not just end with the launch of these innovatory products; they have also been recognized as the 2025 TSMC OIP Partner of the Year in Specialty Process IP, marking an impressive eighth consecutive year of distinction in this category. The continual recognition underscores M31’s influential role and contributions within the TSMC ecosystem, further solidifying its position as a leader in silicon intellectual property innovation.

CEO Scott Chang articulated the significance of this partnership by stating, "M31's long-standing collaboration with TSMC is foundational to our innovation. Our journey from the N12e Low-VDD solutions to the latest N6e ULL, ELL, and Low-VDD memory compilers reflects our commitment to advancing silicon technologies for AIoT and edge applications. We are eager to strengthen our work with TSMC and OIP ecosystem partners to shape the future of AI-powered technologies."

Conclusion

As M31 Technology continues to innovate within the realm of silicon IPs, the new ultra-low power memory compilers not only serve to enhance the capabilities of AIoT devices but also pave the way for future developments in energy efficiency and performance within semiconductor technology. With a commitment to quality and efficiency, these innovations illustrate M31's pivotal role in the evolving landscape of technology designed for a smarter, more interconnected world.