Huawei Introduces UnifiedBus Computing Architecture for Enhanced SuperPod Performance
Huawei has made significant strides in computing architecture innovation, particularly showcased during the recent HUAWEI CONNECT 2026 event. CEO Yang Chaobin presented the UnifiedBus interconnect architecture, emphasizing its role in overcoming the performance limitations of traditional computing systems, particularly when scaling. In traditional architectures, as clusters expand, resource utilization tends to decline, often leading to systems underachieving with potentially over 80% of the capacity lying dormant during operations. This inefficiency is particularly evident in large models requiring extensive data processing, where the compute-to-communication ratio is deeply impacted. The launch of the UnifiedBus architecture is Huawei's strategic response to this challenge, enabling better utilization and collaboration within clusters.
The UnifiedBus architecture introduces several innovative features designed to enhance computing efficiency and support the growing demand for advanced applications in various sectors. One of the major breakthroughs is the integration of multiple interconnect protocols under a single UnifiedBus protocol, effectively improving interconnect bandwidth from the traditional levels of 100 GB/s to an impressive TB/s range. Moreover, it dramatically reduces the round-trip time (RTT) latency from 7 microseconds down to 2 microseconds, thereby facilitating a seamless machine learning and data processing experience.
The architecture also promotes heterogeneous computing by enabling direct connections among CPUs, NPUs, memory, and solid-state drives (SSDs). This decentralized access fosters a flexible computing environment, allowing for optimized collaborative performance. Furthermore, the implementation of tiered storage with global resource pooling supports cache activations while maintaining performance efficiency across workloads. Notably, organizations can leverage Double Data Rate (DDR) memory as an alternative along with NPUs, lessening the strain on hardware while simultaneously accelerating processes tied to data retrieval.
With a keen focus on scalability, the UnifiedBus architecture encompasses various products tailored for interconnections within cabinets, across cabinets, and between clusters. For instance, the UnifiedBus LinkBlade optimizes space and enhances performance by adopting a cable-free design, significantly reducing cabling needs within large-scale systems. Meanwhile, across clusters, the UnifiedBus UBG switch boasts a fan-out capacity that supports extensive scaling from modest sized units up to a million-NPU SuperCluster, paving the way for future applications demanding trillions of parameters.
In addition to cluster innovations, Huawei's efforts extend to the development of the UnifiedBus-powered agentic AI SuperCluster, integrating state-of-the-art hardware for next-generation applications. This comprehensive computing solution includes TaiShan 950 and Atlas 960 SuperPods, alongside powerful storage and networking components, promising to redefine how computing resources are managed and leveraged. The collaborative approach with open-source communities, such as partnerships with DeepSeek Harness and OpenCode, facilitates the development of customizable tools that promote innovative applications across industries.
In his address, Yang reiterated Huawei's commitment to pioneering at a systems-level while fostering an open-source ecosystem that empowers customers and partners alike in their computational endeavors. As the demand for sophisticated computing solutions continues to grow, the UnifiedBus innovation positions Huawei as a thoughtful leader poised to reshape the future of technology deployments.